Symbol I
I is the quantity selected or evaluated by the optimization written on the right.
Read this term in its guide →Published equation contexts
The roofline model, introduced by Williams, Waterman, and Patterson in 2009, gives the concept its formal shape. It plots two independent ceilings on the same chart: the chip’s peak arithmetic throughput (operations per second) on one axis, and its peak memory bandwidth (bytes per second) combined with a workload-specific ratio on the other. That ratio — arithmetic intensity — is defined as the number of floating-point operations performed per byte of data moved between memory and the arithmetic units [ 4 ] . A workload’s achievable throughput is bounded by whichever ceiling it hits first: . When a workload’s intensity I is high enough that I B…
I is the quantity selected or evaluated by the optimization written on the right.
Read this term in its guide →chievable appears in the objective or constraint used by the optimization on the right.
Read this term in its guide →eak compute appears in the objective or constraint used by the optimization on the right.
Read this term in its guide →B appears in the objective or constraint used by the optimization on the right.
Read this term in its guide →eak memory appears in the objective or constraint used by the optimization on the right.
Read this term in its guide →The complete quantity above the fraction bar. FLOPs count floating-point arithmetic operations.
Read this term in its guide →The complete quantity below the fraction bar; it must be nonzero for this division. Bytes measure the data moved or stored.
Read this term in its guide →With a fixed numerator, increasing a nonzero denominator reduces the fraction. Read it with the definitions, units, and assumptions supplied by the article.
A symbol can carry a different meaning in another article. Each occurrence keeps its own guide and term definitions.
Equation 1 · Semiconductors
This equation states an equality: the expressions on both sides have the same value under the article’s assumptions.
The roofline model, introduced by Williams, Waterman, and Patterson in 2009, gives the concept its formal shape. It plots two independent ceilings on the same chart: the chip’s peak arithmetic throughput (operations per second) on one axis, and its peak memory bandwidth (bytes per second) combined with a workload-specific ratio on the other. That ratio — arithmetic intensity — is defined as the number of floating-point operations performed per byte of data moved between memory and the arithmetic units [ 4 ] . A workload’s achievable throughput is bounded by whichever ceiling it hits first: . When a workload’s intensity I is high enough that I B…
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