What does this equation mean?

Call it $R_n$ : the FLOPs-per-second a GPU’s tensor cores can deliver, divided by the bytes-per-second its memory subsystem can supply. The unit that falls out is FLOPs per byte — the arithmetic intensity a workload needs in order to keep that generation’s compute fed rather than starved. This is not a new concept; it is the roofline model, decades old in computer architecture, and the general case for reading any accelerator through it — where the “memory wall” sits, why arithmetic intensity rather than raw FLOPs decides real-world throughput — is already made in full in this publication’s own accelerator architecture explainer , and this piece leans on that framework rather than re-deriving it. What has not been done, at least not as a named, generation-by-generation series tied to one vendor’s own product decisions, is compute $R_n$ for Nvidia specifically, across enough generations to see whether it is trending anywhere, and then ask what a specific climbing trend would force a chip designer to do about it.