Equation 19 · What an AI Accelerator Actually Is: Silicon, Packaging, and the Memory It Can Reach
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The model also explains why kernel engineering has taken the shape it has. FlashAttention is the canonical demonstration: Dao and colleagues argued that attention implementations were missing an IO-aware principle, and used tiling to reduce reads and writes between high-bandwidth memory and on-chip SRAM, reporting speedups including 3x on GPT-2 at sequence length 1K and 15% end-to-end on BERT-large at sequence length 512 [ 5 ] . The arithmetic performed did not fall — the result is exact attention, not an approximation. What fell was Q . In roofline terms the kernel was moved to the right along the intensity axis until the compute ceiling became the binding constraint. Fusion, tiling,…
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The model also explains why kernel engineering has taken the shape it has. FlashAttention is the canonical demonstration: Dao and colleagues argued that attention implementations were missing an IO-aware principle, and used tiling to reduce reads and writes between high-bandwidth memory and on-chip SRAM, reporting speedups including 3x on GPT-2 at sequence length 1K and 15% end-to-end on BERT-large at sequence length 512 [ 5 ] . The arithmetic performed did not fall — the result is exact attention, not an approximation. What fell was Q . In roofline terms the kernel was moved to the right along the intensity axis until the compute ceiling became the binding constraint. Fusion, tiling, recomputation and operator scheduling are all, without exception, the same manoeuvre.
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