Equation 1 · Part 2 · Patterning at the Limit: What Actually Happens When a Chip Is Manufactured
Symbol k_1
What this part means
a dimensionless process factor absorbing illumination scheme, mask engineering and resist behaviour.
Its job in the formula
is an input to the expression that computes the quantity on the left.
Full expression→Symbol k_1→Article meaning
Where the article explains it
where is the exposure wavelength, is the numerical aperture of the projection optics, and is a dimensionless process factor absorbing illumination scheme, mask engineering and resist behaviour.
The passage around this formula
…lithography is an imaging problem, and its resolution obeys the Rayleigh relation . where is the exposure wavelength, is the numerical aperture of the projection optics, and is a dimensionless process factor absorbing illumination scheme, mask engineering and resist behaviour. Two-beam interference sets a hard floor: for a periodic line-and-space pattern the smallest printable half-pitch is / (2\,) , which is = 0.25 in the convention where R…
Learn the underlying idea
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Sources cited in the article section
- [1] International Roadmap for Devices and Systems 2023 Update: Lithography and Patterning ↗
- [8] TWINSCAN NXT:2050i ↗
These citations provide research context; check each source for the exact claim it supports.