What does this equation mean?

That structural fact can be written compactly. If $P_{\text{budget}}$ is the (roughly fixed, application-set) power envelope in watts and $\eta(t)$ is the achieved energy efficiency of the best available accelerator at time t , measured in tera-operations per second per watt, then the usable on-device compute throughput is approximately $C_{\text{edge}}(t) \approx P_{\text{budget}} \cdot \eta(t)$. This is not a scaling law in the sense of a fitted curve; it is closer to an accounting identity, and its value is in what it rules out. Because $P_{\text{budget}}$ is nearly constant for a given device class, essentially all of the growth in on-device model capability that anyone can expect by 2035 has to come from growth in $\eta(t)$ — from architecture, from process, from numerical precision, and, in the discontinuity scenario below, from a different physical mechanism entirely. Reuther and colleagues’ survey of commercial AI accelerators, which compiles peak-performance and power figures across dozens of parts and computes efficiency relative to that peak, documents exactly this pattern: efficiency, not raw throughput, is the axis on which parts aimed at constrained power budgets actually compete, and the gap between digital and mixed-signal or in-memory approaches on that axis is large enough to matter [ 8 ] .