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Equation 11 · An Optical Fabric Turns Off-Package Memory Into an Extension of the Die

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LL

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LL

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The copper side of the ratio fares only slightly better, and for an instructive reason: the closest available real-world figure is not a clean memory-subsystem number either. NVIDIA’s H200 accelerator ships 141 gigabytes of HBM3e and delivers 4.8 terabytes per second of memory bandwidth at a rated thermal design power of up to 700 watts in its SXM configuration [ 5 ] . Dividing one by the other gives a bandwidth-per-watt figure for the whole package — but the whole package’s power budget includes its compute cores, not only its memory interface, and there is no public disclosure that isolates how many of those 700 watts the HBM3e subsystem itself actually draws. Using the whole-package…
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The copper side of the ratio fares only slightly better, and for an instructive reason: the closest available real-world figure is not a clean memory-subsystem number either. NVIDIA’s H200 accelerator ships 141 gigabytes of HBM3e and delivers 4.8 terabytes per second of memory bandwidth at a rated thermal design power of up to 700 watts in its SXM configuration [ 5 ] . Dividing one by the other gives a bandwidth-per-watt figure for the whole package — but the whole package’s power budget includes its compute cores, not only its memory interface, and there is no public disclosure that isolates how many of those 700 watts the HBM3e subsystem itself actually draws. Using the whole-package figure as PcuP_{\text{cu}} therefore overstates the copper baseline’s energy cost relative to memory bandwidth alone, which means it understates βcu\beta_{\text{cu}} and, mechanically, would inflate any L computed against it. Even the “easy” side of this ratio is a biased proxy, not a clean measurement — and the bias runs in the direction that would make the optical case look better than it may actually be, which is exactly the wrong direction to lean on for a piece arguing that headline efficiency claims deserve scrutiny.

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