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The passage around this formula

Taking b as large as the constraint allows gives $Q_{\min} \;\approx\; 2\sqrt{3}\,\frac{N^3}{\sqrt{M}}$. Two things in that expression matter more than the constant. First, traffic falls linearly in b : doubling the tile halves the bytes moved, which is why tiling is the single highest-leverage transformation in dense linear algebra. Second, and less often noticed, traffic falls only as $M^{-1/2}$ . Quadrupling the fast store buys a factor of two in traffic, not a factor of four. That square root is the reason architects cannot simply spend their way out of the problem with more SRAM, and it is worth holding on to when reading any claim that a larger cache will fix a bandwidth-bound kernel.

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